? semiconductor components industries, llc, 2000 march, 2000 rev. 7 1 publication order number: mc10h124/d
the mc10h124 is a quad translator for interfacing data and control signals between a saturated logic section and the mecl section of digital systems. the 10h part is a functional/pinout duplication of the standard mecl 10k family part, with 100% improvement in propagation delay, and no increase in powersupply current. ? propagation delay, 1.5 ns typical ? improved noise margin 150 mv (over operating voltage and temperature range) ? voltage compensated ? mecl 10kcompatible logic diagram dip pin assignment b out a out b out a out a in common strobe b in v ee gnd c out d out d out c out d in c in v cc 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 gnd = pin 16 v cc ( +5.0 vdc)= pin 9 v ee ( 5.2 vdc) = pin 8 11 13 14 10 12 15 7 3 1 6 5 4 2 pin assignment is for dualinline package. for plcc pin assignment, see the pin conversion tables on page 18 of the on semiconductor mecl data book (dl122/d). http://onsemi.com device package shipping ordering information mc10h124l cdip16 25 units/rail mc10h124p pdip16 25 units/rail mc10h124fn plcc20 46 units/rail marking diagrams 1 16 a = assembly location wl = wafer lot yy = year ww = work week cdip16 l suffix case 620 mc10h124l awlyyww pdip16 p suffix case 648 plcc20 fn suffix case 775 10h124 awlyyww 1 1 16 mc10h124p awlyyww
mc10h124 http://onsemi.com 2 maximum ratings symbol characteristic rating unit v ee power supply (v cc = 5.0 v) 8.0 to 0 vdc v cc power supply (v ee = 5.2 v) 0 to +7.0 vdc v i input voltage (v cc = 5.0 v) ttl 0 to v cc vdc i out output current e continuous e surge 50 100 ma t a operating temperature range 0 to +75 c t stg storage temperature range e plastic e ceramic 55 to +150 55 to +165 c electrical characteristics (v ee = 5.2 v 5%, v cc = 5.0 v 5.0%) 0 25 75 symbol characteristic min max min max min max unit i e negative power supply drain current e 72 e 66 e 72 ma i cch positive power supply e 16 e 16 e 18 ma i ccl drain current e 25 e 25 e 25 ma i r reverse current pin 6 pin 7 e e 200 50 e e 200 50 e e 200 50 m a i f forward current pin 6 pin 7 e e 12.8 3.2 e e 12.8 3.2 e e 12.8 3.2 ma v (br)in input breakdown voltage 5.5 e 5.5 e 5.5 e vdc v i input clamp voltage e 1.5 e 1.5 e 1.5 vdc v oh high output voltage 1.02 0.84 0.98 0.81 0.92 0.735 vdc v ol low output voltage 1.95 1.63 1.95 1.63 1.95 1.60 vdc v ih high input voltage 2.0 e 2.0 e 2.0 e vdc v il low input voltage e 0.8 e 0.8 e 0.8 vdc 1. each mecl 10h series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibri um has been established. the circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 ifp m is maintained. outputs are terminated through a 50ohm resistor to 2.0 volts. electrical characteristics (v ee = 5.2 v 5%, v cc = 5.0 v 5.0%) 0 25 75 symbol characteristic min max min max min max unit ac parameters t pd propagation delay 0.55 2.25 0.55 2.4 0.85 2.95 ns t r rise time 0.5 1.5 0.5 1.6 0.5 1.7 ns t f fall time 0.5 1.5 0.5 1.6 0.5 1.7 ns applications information the mc10h124 has ttlcompatible inputs and mecl complementary openemitter outputs that allow use as an inverting/noninverting translator or as a differential line driver. when the common strobe input is at the lowlogic level, it forces all true outputs to a mecl lowlogic state and all inverting outputs to a mecl highlogic state. an advantage of this device is that ttllevel information can be transmitted differentially, via balanced twisted pair lines, to mecl equipment, where the signal can be received by the mc10h115 or mc10h116 differential line receivers. the power supply requirements are ground, +5.0 volts, and 5.2 volts.
mc10h124 http://onsemi.com 3 package dimensions plcc20 fn suffix plastic plcc package case 77502 issue c notes: 1. datums l, m, and n determined where top of lead shoulder exits plastic body at mold parting line. 2. dimension g1, true position to be measured at datum t, seating plane. 3. dimensions r and u do not include mold flash. allowable mold flash is 0.010 (0.250) per side. 4. dimensioning and tolerancing per ansi y14.5m, 1982. 5. controlling dimension: inch. 6. the package top may be smaller than the package bottom by up to 0.012 (0.300). dimensions r and u are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 7. dimension h does not include dambar protrusion or intrusion. the dambar protrusion(s) shall not cause the h dimension to be greater than 0.037 (0.940). the dambar intrusion(s) shall not cause the h dimension to be smaller than 0.025 (0.635). m n l y brk w v d d s lm m 0.007 (0.180) n s t s lm m 0.007 (0.180) n s t s lm s 0.010 (0.250) n s t x g1 b u z view dd 20 1 s lm m 0.007 (0.180) n s t s lm m 0.007 (0.180) n s t s lm s 0.010 (0.250) n s t c g view s e j r z a 0.004 (0.100) t seating plane s lm m 0.007 (0.180) n s t s lm m 0.007 (0.180) n s t h view s k k1 f g1 dim min max min max millimeters inches a 0.385 0.395 9.78 10.03 b 0.385 0.395 9.78 10.03 c 0.165 0.180 4.20 4.57 e 0.090 0.110 2.29 2.79 f 0.013 0.019 0.33 0.48 g 0.050 bsc 1.27 bsc h 0.026 0.032 0.66 0.81 j 0.020 0.51 k 0.025 0.64 r 0.350 0.356 8.89 9.04 u 0.350 0.356 8.89 9.04 v 0.042 0.048 1.07 1.21 w 0.042 0.048 1.07 1.21 x 0.042 0.056 1.07 1.42 y 0.020 0.50 z 2 10 2 10 g1 0.310 0.330 7.88 8.38 k1 0.040 1.02
mc10h124 http://onsemi.com 4 cdip16 l suffix ceramic dip package case 62010 issue t notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension f may narrow to 0.76 (0.030) where the lead enters the ceramic body. a b t f e g n k c seating plane 16 pl d s a m 0.25 (0.010) t 16 pl j s b m 0.25 (0.010) t m l dim min max min max millimeters inches a 0.750 0.785 19.05 19.93 b 0.240 0.295 6.10 7.49 c 0.200 5.08 d 0.015 0.020 0.39 0.50 e 0.050 bsc 1.27 bsc f 0.055 0.065 1.40 1.65 g 0.100 bsc 2.54 bsc h 0.008 0.015 0.21 0.38 k 0.125 0.170 3.18 4.31 l 0.300 bsc 7.62 bsc m 0 15 0 15 n 0.020 0.040 0.51 1.01 16 9 18 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. a b f c s h g d j l m 16 pl seating 18 9 16 k plane t m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 pdip16 p suffix plastic dip package case 64808 issue r on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent r ights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into t he body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong 80044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1418549 phone : 81357402745 email : r14525@onsemi.com fax response line : 3036752167 8003443810 toll free usa/canada on semiconductor website: http://onsemi.com for additional information, please contact your local sales representative. mc10h124/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone: (+1) 3033087140 (mf 2:30pm to 5:00pm munich time) email: onlitgerman@hibbertco.com french phone: (+1) 3033087141 (mf 2:30pm to 5:00pm toulouse time) email: onlitfrench@hibbertco.com english phone: (+1) 3033087142 (mf 1:30pm to 5:00pm uk time) email: onlit@hibbertco.com
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